This invention relates to vertical V-groove FETs, and more particularly to a Schottky barrier gate in a vertical FET structure that makes possible extremely short (less than 1000 .ANG.) channel devices which are beyond the reach of optical lithographic processes.
The introduction of DMOS (double-diffused MOS) and VMOS (nonplanar or V-groove MOS) based on silicon and SiO.sub.2 insulation has led to a significant improvement in the performance of microwave amplifiers, high speed logic devices, and especially high voltage switching devices. See Salama, et al., "Nonplanar Power Field-Effect Transistors," IEEE Trans. Elect. Dev., Ed-25, pp 1222-28 (1978), in which V-groove structures for field-effect transistors (FET's) of both the junction type (VFET) and the insulated gate type (LVMOST) for power applications, but only in silicon material systems. GaAs is suggested as an alternative material, but no structure using GaAs is described. Instead, it is implied that this material be used in a manner strictly analogous to the silicon material. See also Lesiak, et al., "Optimization of Nonplanar Power MOS Transistors," IEEE Trans. on Elect. Dev., Ed-25, pp 1229-34 (1978), Mok, et al., "A V-Groove Schottky-Barrier FET for UHF Applications," IEEE Trans. on Elect. Dev., Ed-25, pp 1235-40 (1978), and Tamer, et al., "Numerical Comparison of DMOS, VMOS and UMOS Power Transistors," IEEE Trans. Elect. Dev., Ed-30 pp 73-76 (1983).
In the past few years, short channel FET devices have generated considerable interest. Basically, in nonplanar V-groove structures, grooves are etched in a p-type silicon interlayer to define the channel region of the vertical structure between the silicon substrate depletion region (drain) and an n doped layer (source) on top. An MOS gate is then formed in the V-groove, as shown in FIG. 8 at page 126 by Salama, et al., supra. The problem with this prior art device is the long controlled channel that is necessary between the source and drain. However, conventional submicron devices often suffer from high source resistance which offsets the advantage gained from the short channel.